1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device.
2. Description of the Background Art
Miniaturization of a transistor is needed to increase an integration density and an operation speed and to reduce power consumption, for a semiconductor device. To this end, various aspects in a technology for manufacturing a semiconductor device have been adapted so as to achieve miniaturization of a transistor.
Formation of a pn junction is one of significant processes in manufacture of a semiconductor device, and there has been a demand for miniaturizing also a pn junction. In this regard, it is desirable to form a pn junction so as to be as shallow as possible from a surface of a semiconductor, which is one example of attempts to miniaturize a pn junction. For example, when a design rule is 80 nm, the pn junction will be formed at a depth about 20 nm from a surface of a semiconductor.
Formation of a pn junction is broadly divided into two processes of: an impurity introduction process in which impurities are introduced into a semiconductor by ion implantation, for example; and an activation process in which the impurities as introduced are activated. Hence, there has been a strong demand for specific techniques for an impurity introduction process and an activation process, in order to form a pn junction at the above noted depth. In particular, as for an impurity introduction process, demanded is a technique for accomplishing ion implantation at a low energy which allows for control of a depth to which ions are implanted such that the depth falls within a range from several nanometers to a dozen or so nanometers. As for an activation process, demanded is a technique for accomplishing activation of introduced impurities while repairing a crystal defect created in a semiconductor due to ion implantation without allowing implanted atoms to diffuse. As one example of a technique for an activation process, a technique utilizing phonon absorption is cited, which is described in Japanese Patent Application Laid-Open No. 10-214785, and in “Coherent Phonon Excitation as Nonequillibrium Dopant Activation Process for Ultra-Shallow Junction Formation” by Y. Setsuhara et al., Proc. of Extended Abstract of International Workshop on Junction Technology 2001, Japan Society of Applied Physics pp. 103-106.
To perform an activation process, annealing by irradiation with a lamp (hereinafter, referred to as “lamp annealing”) or local melting using a laser light has typically been employed. Such conventional techniques, however, have caused problems of newly creating a crystal defect or inviting deformation of a semiconductor.